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| author | _ov4 <ov4@ov4.org> | 2026-11-09 11:22:50 +0000 |
|---|---|---|
| committer | _ov4 <ov4@ov4.org> | 2026-11-09 11:22:50 +0000 |
| commit | e9651e206ef83bb1dd33b507fdea552e2e446d32 (patch) | |
| tree | da68d21f9e2cf0048bb2bb2b60b265363828f05a /cachelab-handout/trans.h | |
| parent | 121033e4a69e29a6b375993d445cba018ee4975c (diff) | |
Diffstat (limited to 'cachelab-handout/trans.h')
| -rw-r--r-- | cachelab-handout/trans.h | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/cachelab-handout/trans.h b/cachelab-handout/trans.h new file mode 100644 index 0000000..1e1add0 --- /dev/null +++ b/cachelab-handout/trans.h @@ -0,0 +1,19 @@ +#pragma once + +#define LOAD_ROW_4(src, base_i, base_j) \ +do \ +{ \ +t0 = src[base_i][base_j + 0]; \ +t1 = src[base_i][base_j + 1]; \ +t2 = src[base_i][base_j + 2]; \ +t3 = src[base_i][base_j + 3]; \ +} while (0) + +#define STORE_ROW_4(dst, base_i, base_j) \ +do \ +{ \ +dst[base_i][base_j + 0] = t0; \ +dst[base_i][base_j + 1] = t1; \ +dst[base_i][base_j + 2] = t2; \ +dst[base_i][base_j + 3] = t3; \ +} while (0) |